Applicant hereby incorporates by reference Japanese Application No. 2000-385530, filed Dec. 19, 2000, in its entirety.
1. Technical Field
The present invention relates to semiconductor devices and may include semiconductor devices that are applied to a CMOS inverter circuit using a partially depleted SOIxe2x80x94CMOSFET with a floating body.
2. Related Art
A conventional semiconductor device is described below.
A CMOS inverter circuit using a partially depleted SOI (silicon on insulator)xe2x80x94CMOSFET in certain forms may be considered as a conventional semiconductor device. However, this CMOS inverter circuit in conventional form has a problem of duty cycle dependency of input signals which results from substrate floating effects, which is observed as an inverter delay time.
The following three semiconductor devices can be considered as means which may solve the above described problem.
As a first semiconductor device, a fully depleted SOIxe2x80x94MOSFET that does not show the substrate floating effect may be used. Also, as a second semiconductor device, a semiconductor device, in which a body is provided with a terminal and its potential is fixed at a source potential to restrict the substrate floating effect, in other word, a body-tied-to-source operation is conducted, may be used. Also, as a third semiconductor device, a semiconductor device, in which a body is provided with a terminal and its potential is fixed at a gate potential to restrict the substrate floating effect, in other word, a body-tied-to-gate operation is conducted, may be used.